a) Field of the Invention
The present invention relates to an evaluation method for a test semiconductor device, and more particularly to a method of evaluating the quality of wiring formed on a test semiconductor device.
b) Description of the Related Art
Evaluation of a test semiconductor device (hereinafter called a test element group (TEG)) is performed, for example, when manufacture processes of a semiconductor device is developed or when new circuit design is made. For evaluation, a test wiring pattern (TEG pattern) is formed on a semiconductor device and thereafter the TEG pattern is inspected whether there is an open or short circuit point.
FIGS. 16A and 16B illustrate an evaluation method for TEG according to a conventional technique.
FIG. 16A shows TEG whose wiring is tested as to whether there is any breakage. Electrodes 91 and 91' are connected between opposite ends of a predetermined wiring pattern 92. A voltage is applied across the electrodes 91 and 91'. If current flows, it can be judged that the wiring pattern 92 has no open circuit, whereas if current does not flow, it can be judged that the wiring pattern 92 has an open circuit. In this manner, any breakage of the wiring pattern can be checked.
FIG. 16B shows TEG whose wiring is tested as to whether there is any short circuit. An electrode 95 is connected to a predetermined comb-shaped wiring pattern 96. Another electrode 95' is connected to a predetermined comb-shaped wiring pattern 96'. The wiring patterns 96 and 96' are disposed interdigitally facing each other without mutual contact and are electrically insulated.
A voltage is applied across the electrodes 95 and 95'. If current does not flow, it can be judged that the wiring patterns 96 and 96' are not short circuited, whereas if current flows, it can be judged that the wiring patterns 96 and 96' are short circuited. In this manner, any short circuit between the wiring patterns 96 and 96' can be checked.
It is possible to check whether there is any short or open circuit point in the wiring pattern by using TEGs shown in FIGS. 16A and 16B. However, although it is possible to know that there is a short or open circuit, the position of a short circuit point or an open circuit point of the wiring cannot be located.